Punyasloka Bal

Punyasloka Bal

nVidia Corporation - Santa Clara / United States
Engineering & Technology / Electrical & Electronic Engineering
AD Scientific Index ID: 4458598
person_outline Punyasloka Bal's MOST POPULAR ARTICLES
1-) Performance estimation of sub-30 nm junctionless tunnel FET (JLTFET)P Bal, MW Akram, P Mondal, B GhoshJournal of Computational Electronics 12, 782-789, 2013802013
2-) Planar junctionless transistor with non-uniform channel dopingP Mondal, B Ghosh, P BalApplied Physics Letters 102 (13), 2013802013
3-) A junctionless tunnel field effect transistor with low subthreshold slopeB Ghosh, P Bal, P MondalJournal of Computational Electronics 12 (3), 428-436, 2013622013
4-) Dual material gate junctionless tunnel field effect transistorP Bal, B Ghosh, P Mondal, MW Akram, BMM TripathiJournal of Computational Electronics 13, 230-234, 2014502014
5-) Hetero-gate-dielectric double gate junctionless transistor (HGJLT) with reduced band-to-band tunnelling effects in subthreshold regimeB Ghosh, P Mondal, MW Akram, P Bal, AK SalimathJournal of Semiconductors 35 (6), 064001, 2014392014