Alex Carsello

Alex Carsello

Stanford University - Stanford / United States
Engineering & Technology / Electrical & Electronic Engineering
AD Scientific Index ID: 5152114
person_outline Alex Carsello's MOST POPULAR ARTICLES
1-) Creating an agile hardware design flowR Bahr, C Barrett, N Bhagdikar, A Carsello, R Daly, C Donovick, D Durst, ...2020 57th ACM/IEEE Design Automation Conference (DAC), 1-6, 2020292020
2-) Amber: A 367 GOPS, 538 GOPS/W 16nm SoC with a Coarse-Grained Reconfigurable Array for Flexible Acceleration of Dense Linear AlgebraA Carsello, K Feng, T Kong, K Koul, Q Liu, J Melchert, G Nyengele, ...2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and …, 2022192022
3-) AHA: An Agile Approach to the Design of Coarse-Grained Reconfigurable Accelerators and CompilersK Koul, J Melchert, K Sreedhar, L Truong, G Nyengele, K Zhang, Q Liu, ...ACM Transactions on Embedded Computing Systems (TECS), 018
4-) A framework for adding low-overhead, fine-grained power domains to CGRAsA Nayak, K Zhang, R Setaluri, A Carsello, M Mann, S Richardson, R Bahr, ...2020 Design, Automation & Test in Europe Conference & Exhibition (DATE), 846-851, 2020102020
5-) Creating an agile hardware design flow. In 2020 57th ACM/IEEE Design Automation Conference (DAC)R Bahr, C Barrett, N Bhagdikar, A Carsello, R Daly, C Donovick, D Durst, ...IEEE, 202072020