HR Bhagyalakshmi

HR Bhagyalakshmi

BMS College of Engineering - Bangalore / India
Engineering & Technology / Electrical & Electronic Engineering
AD Scientific Index ID: 4700169
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person_outline HR Bhagyalakshmi's MOST POPULAR ARTICLES
1-) An improved design of a multiplier using reversible logic gates HR Bhagyalakshmi, MK Venkatesha International journal of engineering science and technology 2 (8), 3838-3845, 2010 1482010
2-) Novel low power comparator design using reversible logic gates AN Nagamani, HV Jayashree, HR Bhagyalakshmi Indian Journal of Computer Science and Engineering (IJCSE) 2 (4), 566-574, 2011 962011
3-) Optimized reversible BCD adder using new reversible logic gates HR Bhagyalakshmi, MK Venkatesha arXiv preprint arXiv:1002.3994, 2010 742010
4-) Optimized multiplier using reversible multi-control input toffoli gatesHR Bhagyalakshmi, MK VenkateshaInternational Journal of VLSI Design & Communication Systems 3 (6), 27, 2012362012
5-) Design of parity preserving logic based fault tolerant reversible arithmetic logic unitR Saligram, SS Hegde, SA Kulkarni, HR Bhagyalakshmi, MK VenkateshaarXiv preprint arXiv:1307.3690, 2013232013