Jae-Seok Yang

Jae-Seok Yang

Cadence Design Systems - / United States
Others
AD Scientific Index ID: 4964271
person_outline Jae-Seok Yang's MOST POPULAR ARTICLES
1-) Double patterning layout decomposition for simultaneous conflict and stitch minimization K Yuan, JS Yang, D Pan Proceedings of the 2009 international symposium on Physical design, 107-114, 2009 1492009
2-) TSV stress aware timing analysis with applications to 3D-IC layout optimization JS Yang, K Athikulwongse, YJ Lee, SK Lim, DZ Pan Proceedings of the 47th Design Automation Conference, 803-806, 2010 1432010
3-) Stress-driven 3D-IC placement with TSV keep-out zone and regularity study K Athikulwongse, A Chakraborty, JS Yang, DZ Pan, SK Lim 2010 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 669-674, 2010 1212010
4-) A new graph-theoretic, multi-objective layout decomposition framework for double patterning lithographyJS Yang, K Lu, M Cho, K Yuan, DZ Pan2010 15th Asia and South Pacific Design Automation Conference (ASP-DAC), 637-644, 2010832010
5-) Overlay aware interconnect and timing variation modeling for double patterning technologyJS Yang, DZ Pan2008 IEEE/ACM International Conference on Computer-Aided Design, 488-493, 2008522008