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Jairam Sukumar
Qualcomm Ireland - Dublin / Ireland
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AD Scientific Index ID: 5336934
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Jairam Sukumar's MOST POPULAR ARTICLES
1-)
Clock gating for power optimization in ASIC design cycle theory & practice.S Jairam, M Rao, J Srinivas, P Vishwanath, H Udayakumar, JC RaoISLPED, 307-308, 2008282008
2-)
Clock gating effectiveness metrics: Applications to power optimizationJ Srinivas, M Rao, S Jairam, H Udayakumar, J RaoQuality of Electronic Design, 2009. ISQED 2009. Quality Electronic Design …, 2009122009
3-)
Verification of a MEMS based adaptive cruise control system using simulation and semi-formal approachesS Jairam, K Lata, SK Roy, N BhatElectronics, Circuits and Systems, 2008. ICECS 2008. 15th IEEE International …, 200892008
4-)
Design of gating and riser system for grate bar castingS Santhi, BR Surya, S Jairam, J Jhansi, PKS SubramanianIndian Foundry Journal 61 (1), 201552015
5-)
A methodology for fast vector based power supply and substrate noise analysesSP Debnath, S Jairam, H UdaykumarVLSI Design, 2005. 18th International Conference on, 808-811, 200542005
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