Lars Heineck

Micron Technology Inc - - / United States

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AD Scientific Index ID: 4523480

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Lars Heineck's MOST POPULAR ARTICLES

1-) A highly manufacturable deep trench based DRAM cell layout with a planar array device in a 70nm technologyJ Amon, A Kieslich, L Heineck, T Schuster, J Faul, J Luetzen, C Fan, ...IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004., 73-76, 2004392004

2-) Memory cells, arrays of memory cells, and methods of forming memory cellsL Heineck, J GuhaUS Patent 8,361,856, 2013362013

3-) Arrays of vertically-oriented transistors, memory arrays including vertically-oriented transistors, and memory cellsLP Heineck, JT DoeblerUS Patent 9,036,391, 2015352015

4-) Method of fabricating a Si3N4/polycide structure using a dielectric sacrificial layer as a maskP Coronel, P Costaganna, L HeineckUS Patent 6,342,452, 2002332002

5-) Memory cell array and method of forming the sameM Popp, F Jakubowski, J Holz, L HeineckUS Patent 7,274,060, 2007312007

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