Navonil Chatterjee

Navonil Chatterjee

Université de Bretagne Sud - Lorient / France
Others
AD Scientific Index ID: 4577020
University of Southern Brittany
person_outline Navonil Chatterjee's MOST POPULAR ARTICLES
1-) Fault-tolerant dynamic task mapping and scheduling for network-on-chip-based multicore platformN Chatterjee, S Paul, S ChattopadhyayACM Transactions on Embedded Computing Systems (TECS) 16 (4), 1-24, 2017352017
2-) Task mapping and scheduling for network-on-chip based multi-core platform with transient faultsN Chatterjee, S Paul, S ChattopadhyayJournal of Systems Architecture 83, 34-56, 2018342018
3-) Deadline and energy aware dynamic task mapping and scheduling for Network-on-Chip based multi-core platformN Chatterjee, S Paul, P Mukherjee, S ChattopadhyayJournal of Systems Architecture 74, 61-77, 2017342017
4-) A spare router based reliable network-on-chip designN Chatterjee, S Chattopadhyay, K Manna2014 IEEE international symposium on circuits and systems (ISCAS), 1957-1960, 2014232014
5-) Reliability-aware application mapping onto mesh based Network-on-ChipN Chatterjee, P Mukherjee, S ChattopadhyayIntegration 62, 92-113, 2018222018