NEWS
New Feature!!!! University Subject Rankings in 12 branches
FOR SCIENTIST REGISTRATION FOR INSTITUTIONAL BULK REGISTRATION
FOR EDIT YOUR UNIVERSITY / INSTITUTION PAGE
Some differences of the AD Scientific Index
New Feature!!!! University Subject Rankings in 12 branches
List without CERN, Statistical Data etc. Only in AD Scientific Index
New Feature!!!! University Subject Rankings in 12 branches
AD
Scientific Index 2024
About Us
Methodology
Compare & Choose
Contact - FAQ
login
Login
person_add
Register
insights
i10 Productivity Rankings
format_list_numbered
Citation Rankings
school
University Rankings
subject
University Subject Rankings
insights
Subject Rankings
place
Country Rankings
format_list_numbered
Top 100 Scientists
format_quote
Top 100 Institutions
local_fire_department
Country Top Lists
Nereo Markulić
AD Scientific Index 2024
Others
Interuniversity Microelectronics Centre - / Belgium
Edit Form
Registration, Add Profile,
Premium Membership
Ranking &
Analysis
Job
Experiences (0)
Education
Information (0)
Published Books (0)
Book Chapters (0)
Articles (0)
Presentations (0)
Lessons (0)
Projects (0)
Congresses (0)
Editorship, Referee &
Scientific Board (0 )
Patents /
Designs (0)
Academic Grants
& Awards (0)
Artistic
Activities (0)
Certificate / Course
/ Trainings (0)
Association &
Society Memberships (0)
Contact, Office
& Social Media
person_outline
Nereo Markulić's MOST POPULAR ARTICLES
1-)
A 9.2–12.7 GHz Wideband Fractional-N Subsampling PLL in 28 nm CMOS With 280 fs RMS Jitter K Raczkowski, N Markulic, B Hershberg, J Craninckx Solid-State Circuits, IEEE Journal of 50 (5), 1203 - 1213, 2015 1312015
2-)
A 10-bit, 550-fs step Digital-to-Time Converter in 28nm CMOS N Markulic, K Raczkowski, P Wambacq, J Craninckx ESSCIRC 2014-40th European Solid State Circuits Conference (ESSCIRC), 79-82, 2014 662014
3-)
A DTC-based subsampling PLL capable of self-calibrated fractional synthesis and two-point modulation N Markulic, K Raczkowski, E Martens, PE Paro Filho, B Hershberg, ... IEEE Journal of Solid-State Circuits 51 (12), 3078-3092, 2016 542016
4-)
24.7 A 673µW 1.8-to-2.5 GHz dividerless fractional-N digital PLL with an inherent frequency-capture capability and a phase-dithering spur mitigation for IoT applicationsY He, YH Liu, T Kuramochi, J van den Heuvel, B Busze, N Markulic, ...2017 IEEE International Solid-State Circuits Conference (ISSCC), 420-421, 2017562017
5-)
3.1 A 3.2 GS/s 10 ENOB 61mW Ringamp ADC in 16nm with Background Monitoring of DistortionB Hershberg, D Dermit, B van Liempd, E Martens, N Markulic, J Lagos, ...2019 IEEE International Solid-State Circuits Conference-(ISSCC), 58-60, 2019432019
ARTICLES
Add your articles
We use cookies to personalize our website and offer you a better experience. If you accept cookies, we can offer you special services.
Cookie Policy
Accept