Prabir Saha

Prabir Saha

National Institute of Technology Meghalaya - Shillong / India
Engineering & Technology / Computer Science
AD Scientific Index ID: 408889
राष्ट्रीय प्रौद्योगिकी संस्थान मेघालय
person_outline Prabir Saha's MOST POPULAR ARTICLES
1-) High speed ASIC design of complex multiplier using vedic mathematicsP Saha, A Banerjee, P Bhattacharyya, A DandapatIEEE Technology Students\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\' Symposium, 237-241, 20111332011
2-) ASIC design of a high speed low power circuit for factorial calculation using ancient Vedic mathematicsP Saha, A Banerjee, A Dandapat, P BhattacharyyaMicroelectronics journal 42 (12), 1343-1352, 2011462011
3-) Improved matrix multiplier design for high‐speed digital signal processing applicationsP Saha, A Banerjee, P Bhattacharyya, A DandapatIET circuits, devices & systems 8 (1), 27-37, 2014262014
4-) High speed low power complex multiplier design using parallel adders and subtractorsPK Saha, A Banerjee, A DandapatInternational Journal on Electronic and Electrical Engineering (IJEEE) 7 (11 …, 2009252009
5-) Vedic divider: Novel architecture (ASIC) for high speed VLSI applicationsP Saha, A Banerjee, P Bhattacharyya, A Dandapat2011 International Symposium on Electronic System Design, 67-71, 2011232011