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Romain Ritzenthaler
Interuniversity Microelectronics Centre - / Belgium
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AD Scientific Index ID: 4983632
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Romain Ritzenthaler's MOST POPULAR ARTICLES
1-)
Gate-all-around MOSFETs based on vertically stacked horizontal Si nanowires in a replacement metal gate process on bulk Si substrates H Mertens, R Ritzenthaler, A Hikavyy, MS Kim, Z Tao, K Wostyn, SA Chew, ... 2016 IEEE symposium on VLSI technology, 1-2, 2016 1662016
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Vertically stacked gate-all-around Si nanowire CMOS transistors with dual work function metal gates H Mertens, R Ritzenthaler, A Chasin, T Schram, E Kunnen, A Hikavyy, ... 2016 IEEE International Electron Devices Meeting (IEDM), 19.7. 1-19.7. 4, 2016 1282016
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Understanding energy efficiency benefits of carbon nanotube field-effect transistors for digital VLSIG Hills, MG Bardon, G Doornbos, D Yakimets, P Schuddinck, R Baert, ...IEEE Transactions on Nanotechnology 17 (6), 1259-1269, 20181282018
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Vertically stacked gate-all-around Si nanowire transistors: Key process optimizations and ring oscillator demonstrationH Mertens, R Ritzenthaler, V Pena, G Santoro, K Kenis, A Schulze, ...2017 IEEE international electron devices meeting (IEDM), 37.4. 1-37.4. 4, 20171262017
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Novel 3D integration process for highly scalable Nano-Beam stacked-channels GAA (NBG) FinFETs with HfO2/TiN gate stackT Ernst, C Dupre, C Isheden, E Bernard, R Ritzenthaler, V Maffini-Alvaro, ...2006 International Electron Devices Meeting, 1-4, 2006972006
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