S Jeevananthan

S Jeevananthan

Pondicherry Engineering College - Pondicherry / India
Engineering & Technology / Electrical & Electronic Engineering
AD Scientific Index ID: 425608
புதுச்சேரி தொழில்நுட்ப பல்கலைக்கழகம்
person_outline S Jeevananthan's MOST POPULAR ARTICLES
1-) Commutation Torque Ripple Reduction in the BLDC Motor Using Modified SEPIC and Three-Level NPC Inverter IEEE Transactions on Power Electronics 33 (1), 535 - 546, 2018
2-) Inverted sine carrier for fundamental fortification in PWM inverters and FPGA based implementations Serbian journal of electrical engineering 4 (2), 171-187, 2007
3-) FPGA based practical implementation of NPC-MLI with SVPWM for an autonomous operation PV system with capacitor balancing International Journal of Electrical Power & Energy Systems 61, 489-509, 2014
4-) Approach for torque ripple reduction for brushless DC motor based on three‐level neutral‐point‐clamped inverter with DC–DC converter IET Power Electronics 8 (1), 47-55, 2015
5-) Cross‐switched multilevel inverter using auxiliary reverse‐connected voltage sources IET Power Electronics 7 (6), 1519-1526, 2014