Soner Yaldiz

Soner Yaldiz

Intel Corporation - California / United States
Others
AD Scientific Index ID: 4428960
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person_outline Soner Yaldiz's MOST POPULAR ARTICLES
1-) A linearized, low-phase-noise VCO-based 25-GHz PLL with autonomic biasingB Sadhu, MA Ferriss, AS Natarajan, S Yaldiz, JO Plouchart, AV Rylyakov, ...IEEE Journal of Solid-State Circuits 48 (5), 1138-1150, 20131062013
2-) Formal verification of phase-locked loops using reachability analysis and continuizationM Althoff, A Rajhans, BH Krogh, S Yaldiz, X Li, L PileggiCommunications of the ACM 56 (10), 97-104, 20131052013
3-) ALIGN: A system for automating analog layoutT Dhar, K Kunal, Y Li, M Madhusudan, J Poojary, AK Sharma, W Xu, ...IEEE Design & Test 38 (2), 8-18, 2020522020
4-) An integral path self-calibration scheme for a dual-loop PLLM Ferriss, JO Plouchart, A Natarajan, A Rylyakov, B Parker, JA Tierno, ...IEEE Journal of Solid-State Circuits 48 (4), 996-1008, 2013542013
5-) SRAM parametric failure analysisJ Wang, S Yaldiz, X Li, LT PileggiProceedings of the 46th annual design automation conference, 496-501, 2009512009