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Stephan Grunow
GlobalFoundries - New York / United States
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AD Scientific Index ID: 5050637
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Stephan Grunow's MOST POPULAR ARTICLES
1-)
Contact resistance reduction by new barrier stack process D Yue, S Grunow, SSP Rao, NM Russell, M Leavy US Patent 7,256,121, 2007 1832007
2-)
High performance 45-nm SOI technology with enhanced strain, porous low-k BEOL, and immersion lithography P Agnello, T Ivers, C Warm, R Wise, R Wachnik, D Schepis, S Sankaran, ... 2006 International Electron Devices Meeting, 1-4, 2006 1342006
3-)
Dual damascene diffusion barrier/liner process with selective via-to-trench-bottom recess SP Rao, S Grunow, N Russell US Patent App. 10/903,597, 2006 952006
4-)
A 7nm CMOS technology platform for mobile and high performance compute applicationS Narasimha, B Jagannathan, A Ogino, D Jaeger, B Greene, C Sheraw, ...2017 IEEE International Electron Devices Meeting (IEDM), 29.5. 1-29.5. 4, 2017682017
5-)
Structure and method of chemically formed anchored metallic viasSC Mehta, DC Edelstein, JA Fitzsimmons, S Grunow, HA Nye III, DL RathUS Patent 7,517,736, 2009482009
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