Sudhakar Reddy

University of Iowa - Iowa City / United States

Engineering & Technology / Electrical & Electronic Engineering

AD Scientific Index ID: 1399918

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Sudhakar Reddy's MOST POPULAR ARTICLES

1-) On delay fault testing in logic circuitsCJ Lin, SM ReddyComputer-Aided Design of Integrated Circuits and Systems, IEEE Transactions …, 19877091987

2-) Easily Testable Realizations ror Logic FunctionsSM ReddyComputers, IEEE Transactions on 100 (11), 1183-1188, 19724661972

3-) COMPACTEST: A method to generate compact test sets for combinational circuitsI Pomeranz, LN Reddy, SM ReddyComputer-Aided Design of Integrated Circuits and Systems, IEEE Transactions …, 19934381993

4-) Techniques for minimizing power dissipation in scan and combinational circuits during test applicationV Dabholkar, S Chakravarty, I Pomeranz, S ReddyComputer-Aided Design of Integrated Circuits and Systems, IEEE Transactions …, 19983831998

5-) Cost-effective generation of minimal test sets for stuck-at faults in combinational logic circuitsS Kajihara, I Pomeranz, K Kinoshita, SM ReddyComputer-Aided Design of Integrated Circuits and Systems, IEEE Transactions …, 19953391995

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