Tarun Samadder

Tarun Samadder

Indian Institute of Technology Bombay - Mumbai / India
Engineering & Technology / Electrical & Electronic Engineering
AD Scientific Index ID: 5467252
भारतीय प्रौद्योगिकी संस्थान, मुंबई
person_outline Tarun Samadder's MOST POPULAR ARTICLES
1-) A physical model for bulk gate insulator trap generation during bias-temperature stress in differently processed p-channel FETsT Samadder, N Choudhury, S Kumar, D Kochar, N Parihar, S MahapatraIEEE Transactions on Electron Devices 68 (2), 485-490, 2021212021
2-) A generic trap generation framework for MOSFET reliability—Part I: Gate only stress–BTI, SILC, and TDDBS Mahapatra, A Ansari, AS Bisht, N Choudhury, N Parihar, P Chatterjee, ...IEEE Transactions on Electron Devices 71 (1), 114-125, 2023
3-) Analysis of sheet dimension (W, L) dependence of NBTI in GAA-SNS FETsN Choudhury, T Samadder, R Tiwari, H Zhou, RG Southwick, M Wang, ...2021 IEEE International Reliability Physics Symposium (IRPS), 1-8, 202192021
4-) A theoretical framework for trap generation and passivation in NAND flash tunnel oxide during distributed cycling and retention bakeT Samadder, S Kumar, K Thakor, S Mahapatra2021 IEEE International Reliability Physics Symposium (IRPS), 1-6, 2021
5-) Tunneling leakage current dependent RDD model framework for gate oxide TDDBT Samadder, S Mahapatra2023 International Conference on Simulation of Semiconductor Processes and …, 2023