NEWS
Institutional Subscription: Comprehensive Analyses to Enhance Your Global and Local Impact
New Feature: Compare Your Institution with the Previous Year
Find a Professional: Explore Experts Across 197 Disciplines in 221 Countries!
Find a Professional
Print Your Certificate
New! Young University / Institution Rankings 2025
New! Art & Humanities Rankings 2025
New! Social Sciences and Humanities Rankings 2025
Highly Cited Researchers 2025
AD
Scientific Index 2025
Scientist Rankings
University Rankings
Subject Rankings
Country Rankings
Login
Register & Pricing
insights
H-Index Rankings
insights
i10 Productivity Rankings
format_list_numbered
Citation Rankings
subject
University Subject Rankings
school
Young Universities
format_list_numbered
Top 100 Scientists
format_quote
Top 100 Institutions
format_quote
Compare & Choose
local_fire_department
Country Reports
person
Find a Professional
Trong Huynh-Bao
Taiwan Semiconductor Manufacturing Company Ltd. - Hsinchu / Taiwan
Others
AD Scientific Index ID: 4383794
台湾半导体制造公司有限公司
Registration, Add Profile,
Premium Membership
Print Your Certificate
Ranking &
Analysis
Job
Experiences (0)
Education
Information (0)
Published Books (0)
Book Chapters (0)
Articles (0)
Presentations (0)
Lessons (0)
Projects (0)
Subject Leaders
Editorship, Referee &
Scientific Board (0 )
Patents /
Designs (0)
Academic Grants
& Awards (0)
Artistic
Activities (0)
Certificate / Course
/ Trainings (0)
Association &
Society Memberships (0)
Contact, Office
& Social Media
person_outline
Trong Huynh-Bao's MOST POPULAR ARTICLES
1-)
Vertical GAAFETs for the Ultimate CMOS ScalingD Yakimets, G Eneman, T Huynh-Bao, P Schuddinck, MG Bardon, ...Electron Devices, IEEE Transactions on 62 (5), 1433-1439, 20151812015
2-)
The Complementary FET (CFET) for CMOS scaling beyond N3J Ryckaert, P Schuddinck, P Weckx, G Bouche, B Vincent, J Smith, ...2018 IEEE Symposium on Vlsi Technology, 141-142, 2018702018
3-)
Nanowire & nanosheet FETs for ultra-scaled, high-density logic and memory applicationsA Veloso, T Huynh-Bao, P Matagne, D Jang, G Eneman, N Horiguchi, ...Solid-State Electronics 168, 107736, 2020502020
4-)
Enablement of STT-MRAM as last level cache for the high performance computing domain at the 5nm nodeS Sakhare, M Perumkunnil, T Huynh-Bao, S Rao, W Kim, D Crotti, F Yasin, ...2018 IEEE International Electron Devices Meeting (IEDM), 18.3. 1-18.3. 4, 2018762018
5-)
Vertical device architecture for 5nm and beyond: Device & circuit implicationsAVY Thean, D Yakimets, T Huynh-Bao, P Schuddinck, S Sakhare, ...2015 Symposium on VLSI Technology (VLSI Technology), T26-T27, 2015622015
ARTICLES
Add your articles
We use cookies to personalize our website and offer you a better experience. If you accept cookies, we can offer you special services.
Cookie Policy
Accept