Vyas R Murnal

Vyas R Murnal

Shri Dharmasthala Manjunatheswara College of Engineering and Technology Dharwad - Dharwad / India
Engineering & Technology / Electrical & Electronic Engineering
AD Scientific Index ID: 4832988
श्री धर्मस्थल मंजुनाथेश्वर कॉलेज ऑफ इंजीनियरिंग एंड टेक्नोलॉजी धारवाड़
person_outline Vyas R Murnal's MOST POPULAR ARTICLES
1-) A quasi-ballistic drain current, charge and capacitance model with positional carrier scattering dependency valid for symmetric DG MOSFETs in nanoscale regime VR Murnal, C Vijaya Nano Convergence 6 (1), 1-8, 2019 92019
2-) Measurement of light luminance and temperature monitoring for real time energy saving applications using Arduino Uno Atmega328 MV Kulkarni, SR Kulkarni, CA Harti, BK Chavan, VR Murnal Bonfring International Journal of Research in Communication Engineering 6 …, 2016 52016
3-) AN IMPROVED NANOSCALE QUASI-BALLISTIC DOUBLE GATE (DG) MOSFET MODEL WITH DRAIN BIAS DEPENDENCY ON CRITICAL CHANNEL LENGTH NEAR THE LOW FIELD SOURCE REGION BY SEMI-EMPIRICAL … VM Vijaya C. ICTACT Journal on Microelectronics 6 (4), 1020-1026, 2021 3*2021
4-) An Analytic Potential Based Velocity Saturated Drain Current, Charge and Capacitance Model for Short Channel Symmetric Double Gate MOSFETsV Murnal, C VijayaAdvances in Electrical and Computer Technologies: Select Proceedings of …, 202022020
5-) A Quasi-Ballistic Drain current model with Positional Scattering Dependency applicable for Nanoscale DG MOSFETsVM Vijaya C.ICECCT 2019, 1-5, 201922019